Overview

The BK7256 is a highly integrated 1×1 single-band 2.4GHz Wi-Fi6 (802.11b/g/n/ax) and Bluetooth 5.2 combo solution designed for applications requiring high security and rich resources, making it ideal for advanced Internet of Things (IoT) applications.

The BK7256 provides state-of-the-art security based on powerful security architecture. It offers an isolated and immutable platform root of trust to provide security services, such as secure boot and cryptographic operations, to applications running on non-secure processing environment.

Using advanced design techniques and ultra-low-power process technology, the BK7256 delivers high integration and minimal power consumption for smart lighting, smart home and other complex IoT applications.

Features

Wi-Fi
• IEEE 802.11b/g/n/ax 1×1 compliant
• 20/40 MHz channel bandwidth for 2.4 GHz
• Supports downlink Multi-User Multiple-Input Multiple-Output (DL MU-MIMO)
• Supports uplink Orthogonal Frequency Division Multiple Access (UL OFDMA)
• Supports individual Target Wake Time (iTWT)
• TX and RX low-density parity check (LDPC) support for extended range
• WPA/WPA2/WPA3-Personal support for enhanced security
• Working mode: STA, AP, Direct
• Concurrent AP + STA
• Integrated BT/WLAN coexistence (PTA)
• TX power up to +18 dBm
• RX sensitivity -99 dBm

Bluetooth

Core and Memory
• Dual 32-bit RISC-V MCUs at up to 320 MHz:
– Each core features a double-precision floating point unit (FPU)
– Each core has 32 K ITCM+32K DTCM+64K ICache+16K DCache
– Each core includes a memory protection unit (MPU)
– Each core supports DSP instructions
• EEMBC CoreMark® score: 1 core at 320 MHz: 3.57 CoreMark/MHz
• 4 MB SiP Flash
• 8 MB SiP PSRAM
• 512 KB Share SRAM
• 64 KB ROM
• 32-byte eFuse
• 8 Kbit OTP
• JTAG/UART for download and debug

• SPI flash download

Security
• Isolated secure element and hardware cryptography
• Secure boot
• Unique ID and secure storage
• Secure update and anti-rollback
• Lifecycle management such as secure debug
• Flash encryption
• Cryptographic hardware acceleration:
– Crypto accelerator: DES, AES-128/192/256, ChaCha20-128/256, SM4-128
– Public key accelerator: ECDSA-P256/P384, RSA-2048/3072, SM2
– Hash: SHA-224/256, SHA-384/512, HMAC, Poly1305, SM3-512

– True Random Number Generator (TRNG)

Clock Management
• External oscillator: 26 MHz crystal oscillator (X26M), 32.768 kHz crystal oscillator (X32K)
• Internal oscillator: 32 kHz ring oscillator (ROSC), 26 ~ 240 MHz digitally controlled oscillator (DCO)
• 320/480MHz PLL (DPLL)

• Audio PLL (APLL)

Power Management
• 2.7 to 5.0 V VBAT supply
• On-chip power-on reset (POR) and brown-out detector (BOD)
• Embedded buck (DC-DC) converter and LDO regulators
• Low power consumption:
– Active mode RX: 63 mA
– Active mode TX: 250 mA
– Low voltage standby mode: 150 μA
– Deep sleep mode: 15 μA

– Shutdown mode: 2.0 μA

Peripherals
• 48 GPIOs
• 2x SPI
• 1x QSPI
• 3x UART: 1 with hardware flow control, 1 with flash download support
• 1x SD/SDIO
• 2x I2C
• 1x full-speed USB OTG (FS)
• 1x CAN controller with CAN FD
• 1x general-purpose DMA controller (GDMA) with 6 channels
• 1x DMA2D controller
• 1x LCD interface (16-bit parallel RGB and I8080)
• 1x JPEG hardware encoder/decoder
• 1x 8-bit CIS DVP camera interface
• Up to 12x 32-bit PWM
• 1x I2S
• 1x audio ADC
• 1x audio DAC
• Four-band digital hardware equalizer
• SBC accelerator
• 13-bit SAR ADC, up to 8 channels
• 6x 32-bit general-purpose timer/counter
• 2x watchdog timer
• 1x real-time counter (RTC)
• 1x IrDA
• 1x temperature sensor

• Up to 16x touch sensor

Packaging
• QFN68 package, 8 x 8 mm
• Operating temperature range: -40 up to +125°C